This invention relates to phase-locked oscillators; and in particular, it relates to circuits which operate in conjunction with such oscillators to determine when the oscillator is locked.
As is well known in the prior art and as is shown in FIG. 1, a phase-locked oscillator includes a phase error corrector circuit 11 and a voltage controlled oscillator circuit (VCO) 12. Circuit 11 has a pair of input terminals, one of which recieves an input signal IN and the other of which receives an output signal OUT from the VCO 12. In operation, circuit 11 sends a control voltage to the VCO 12 with a magnitude that is proportional to the phase difference between the IN and OUT signals. VCO 12 then responds to that control voltage by adjusting the frequency of the OUT signal such that the phase error is reduced.
Also shown in FIG. 1 is a common prior art circuit which detects when the IN and OUT signals are locked. That circuit includes a 90.degree. phase shifter 13, a multiplier 14, a filter 15, and a comparator 16. Additional details of this circuit are described in the textbook Phaselock Techniques by Gardner, 2nd edition, at page 88.
One problem, however, with the above referenced circuit of Gardner is that it is not suitable for integration on a digital logic array chip. This is because the shifter 13 and filter 15 are analog components which are not available in digital logic array chips.
Also, the above referenced Gardner circuit requires a reference voltage V.sub.R which is not available on digital logic array chips. Further, the analog voltage from the filter 15 which is compared against the reference voltage V.sub.R to determine whether or not the oscillator is locked, is sensitive to DC offsets and drift in the reference voltage; and it is also sensitive to offsets and drift in other DC bias voltages in the circuits 13-16.
In addition, the makeup of the 90.degree. phase shifter 13 in the Gardner circuit is frequency dependent. One set of components is needed to shift a 50 MHz OUT signal by 90.degree., and a different set of components is needed to shift a 100 MHz OUT signal by 90.degree.. Thus, over a wide range of OUT frequencies, a single Gardner circuit cannot be used.
Accordingly, a primary object of the invention is to provide a novel circuit which determines when an oscillator is locked and also avoids all of the above described prior art problems.